1. Field of the Invention
This invention relates to a semiconductor memory device and manufacturing method. In particular, the invention relates to an improved semiconductor memory device used as a dynamic RAM and a method of manufacturing.
2. Description of the Prior Art
Recently, although the degree of integration of dynamic RAMs has improved, the capacitor area of the memory cell also has become increasingly smaller. However, in order to prevent soft errors due to alpha-rays, capacitances of at least 50-60 if are necessary. Therefore, in order to ensure a specified capacitance even with a small capacitor area, attempts have been made to form a capacitor in a groove provided in the semiconductor substrate, as shown in FIG. 1.
In FIG. 1, for example, field oxide film 2 is formed on the surface of p-type silicon substrate 1 and the region enclosed by field oxide film 2 becomes a memory cell. A groove 3 is formed in each memory cell and a capacitor oxide film 4 is formed on the surface of substrate 1 including the inner walls of groove 3. Also, capacitor electrode 5 is formed within groove 3 over capacitor oxide film 4 and extends over field oxide film 2. Capacitor electrode 5 becomes the common electrode for a number of memory cells. A cell capacitor is formed by sandwiching capacitor oxide film 4 between substrate 1 and capacitor electrode 5 in this way, and the charge is stored in this cell capacitor.
Moreover, a transfer transistor is formed within the memory cell to transfer the charge to the cell capacitor. This transfer transistor is formed by gate oxide film 6, which is layered over substrate 1, transfer gate electrode 7 and n.sup.+ type source and drain regions 8 and 9, which are formed in substrate 1 on either side of transfer gate electrode 7.
In a dynamic RAM with this type of construction, the charge enters and leaves the cell capacitor via the transfer transistor, and the charge is stored within the cell capacitor in substrate 1 in the vicinity of capacitor oxide film 4. Since a prescribed voltage is always impressed on capacitor electrode 5, the cell capacitor can be charged and discharged by controlling the voltage applied to transfer gate electrode 7.
Thus, a prescribed capacitance can be ensured, even with a small capacitor area, by providing a groove in substrate 1.
However, as the capacitor area is made even smaller in order to improve the degree of integration in a conventional dynamic RAM, it is necessary to make the groove deeper and deeper in order to ensure the prescribed capacitance for the prevention of soft errors. For instance, if the opening of the groove is taken as a square of a(.mu.m)33 a(.mu.m) and the depth is taken as h(.mu.m), the surface area inside the groove equals 4ah +a.sup.2 (.mu.m.sup.2). Therefore, if the degree of integration is increased and a becomes smaller, the same capacitance cannot be ensured unless h is made considerably larger. However, the deeper the groove is made, the more extreme the difficulty of etching to form the groove, and the more difficult the washing process becomes. Moreover there is a limit to the depth of the groove.
On the other hand, increasing the capacitance by making capacitor oxide film 4 thinner can also be considered. However, when the capacitor oxide film is made thinner, an electric field concentrates at the edges of the groove bottom in particular, and there is a risk of breakdown of insulation occurring due to the generation of a tunnel current. Therefore the thickness of the capacitor oxide film cannot be reduced below a specified thickness.